In data storage or memory systems utilizing random access memory circuits, known as RAMs and in dynamic random access memory circuits, or DRAMs, ionizing radiation can easily disrupt the small capacitance of elements of these circuits. Hence, such circuits are particularly susceptible to radiation induced errors and thus, can be unreliable in such an environment. Some of the changes in the logical value of a memory cell or element in these memory circuits can be corrected by well known methods such as by utilizing error correcting codes, (ECC). Consequently, electronic correcting circuits, or so called ECC circuits which utilize these correcting codes, are conventionally provided in conjunction with DRAM arrays.
Errors in these memory circuits are often defined as either soft or hard; with a soft error being a random, non-recurring, single bit error, and a hard error being defined as a fixed, recurring error. Commonly, the ECC circuit may be operable during refresh cycles, and a soft error is corrected by the ECC circuit employing error correction codes and standard technology to utilize redundant elements in lieu of the failed elements. On the other hand, when a hard error is detected by the ECC circuit, the latter produces an uncorrectable error signal, or UE signal, which indicates that the memory is faulty.
Hard errors occur in the manufacture of memory arrays, such that a steering or ordering strategy is generally provided for such arrays to select redundant memory cells, or groups, as replacements for inadequate elements. The ordering information is provided within a fuse array for permanent storage, and in turn, is transferred to a set of latches each time power is applied to the data storage circuit. Stated otherwise, each time the system power is cycled, the data storage system is reset in a conventional set/clear manner with a predetermined steering strategy in accordance with the preset latches.
Consequently, a common arrangement for resolving an uncorrectable error in these memory circuits, is to recycle the system power to thereby provide a set/clear signal to the system. Such power cycling, however, disturbs the overall system, consumes additional power and also results in a loss of data. Hence, it is quite unacceptable in many areas, such as in aerospace applications.
One solution is to radiation harden the data storage circuit as, for example, by encasing at least major portions of the system in a radiation resistant protective shield. As is self evident, however, such shielding requires added bulk, weight and expense to the circuits so as to often be impractical, particularly for aerospace applications. Examples of such protective shields are found in U.S. Pat. No. 5,067,106 which describes the use of a radiation detector coupled with a hardened delay circuit to ensure that writing to storage devices does not occur until after effects of a radiation event have passed, and in U.S. Pat. No. 4,199,810 which describes the use of a hardened memory unit to back up microprocessor instruction performance. Additionally, U.S. Pat. No. 5,052,027, discloses providing a radiation detector coupled with a radiation hardened memory to protect a microprocessor that is not radiation hardened.
Alternatively, other circuit arrangements are provided in the prior art to mitigate the damaging effects of radiation. For example, U.S. Pat. No. 4,506,362 teaches the use of error correction codes for correcting soft errors in DRAM circuits during refresh, and also alleviates correctable errors by replacement of each failing component with a spare component. U.S. Pat. No. 4,031,374 also corrects potential errors by ECC, and further teaches the use of a radiation detector coupled with current limiting circuitry to protect primary magnetic core or wire plate memory from overloads. Further, U.S. Pat. No. 4,653,050 describes a memory system having multiple memory modules, assigned or reassigned to obviate fault conditions.
While each of the above arrangements have select advantages, they generally involve considerable complexity and cost to the circuit as well as added weight. Hence, it is desirable to provide a simple, efficient solution to disturbance from a radiation event while minimizing memory loss without recycling power to the overall system.